vectron international, 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 ? web: www.vectron.com page 1 of 8 rev: 18jun09 fx-730 low jitter vcso frequency translator features ? 5 x 7.5 x 2.5 mm package ? frequency translation up to 850 mhz ? vcso based pll for ultra-low jitter ? cmos / lvds / lvpecl inputs compatible ? differential lvpecl or lvds output ? cmos lock detect ? external divider for input frequencies < 19 mhz ? 0/70c or -40/+85c temperature range ? fully compatible for lead free assembly description the fx-730 is a low jitter precision frequency translator used to translate input frequencies such as 19.44, 38.88, 77.76 mhz, etc. to a binary multiple frequency as high as 850 mhz. the fx-730?s superior jitter performance is achieved through the pll?s integrated vcso. the fx-730 is housed in a hermetically sealed leadless surface mount package offered on tape and reel. applications description standard ? 1-2-4 gigabit fc incits 352-2002 ? 10 gigabit fc incits 364-2003 ? 10gbe lan / wan ieee 802.3ae ? oc-192 itu-t g.709 ? sonet / sdh gr-253-core issue 3 ? fec (forward error correction) scaling figure 1. functional block diagram
fx-730 low jitter vcso frequency translator vectron international, 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 ? web: www.vectron.com page 2 of 8 rev: 18jun09 table 1. electrical performance parameter symbol minimum typical maximum units notes frequency input frequency output frequency f in f out 19.44 125 850 850 mhz mhz 1,2,3 1,2,3 capture range (ordering option) apr 32, 50, or 100 ppm 1,2,3 supply voltage current (no load) v cc i cc 2.97 3.3 3.63 100 v ma 2,3 3 lvcmos input input high voltage input low voltage v ih v il 2 0 v cc 0.8 v v 2,3 lvpecl input peak-peak amplitude swing 0.20 3.00 v 6,7 lock detect output output high voltage logic low voltage v oh v ol 0.9*v cc 0.1*v cc v v outputs mid level - lvpecl swing - lvpecl mid level - lvds swing - lvds current rise time fall time symmetry jitter generation - 622.08 mhz output (12 khz ? 20 mhz bw) (50 khz ? 80 mhz bw) i out t r t f sym j j v cc -1.4 450 v cc -2.0 250 45 v cc -1.25 600 v cc -1.6 410 50 0.21 0.12 v cc -1.0 950 v cc -1.3 450 20 400 400 55 0.5 0.4 v mv-pp v mv-pp ma ps ps % ps-rms ps-rms 2,3 2,3 2,3 2,3 5 4,5 4,5 2,3 5 5 operating temp. (ordering option) t op 0/70, -40/85 c 1,3 1. see standard frequencies and ordering information. 2. parameters are tested with production test circuit below (fig 1). 3. parameters are tested at ambient temperature with test limits guard banded for specified operating temperature. 4. measured from 20% to 80% of a full output swing (fig 2). 5. not tested in production, guaranteed by design, verified at qualification. 6. minimum input low voltage not to exceed 2.125 v. minimum input high voltage not to go below 1.49 v. 7. ac coupling is recommended. there is an internal pu ll-up and pull-down resistor on a ll clock inputs (fin, brclk). figure 1. lvpecl test circuit figure 2. 10k lvpecl waveform
fx-730 low jitter vcso frequency translator vectron international, 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 ? web: www.vectron.com page 3 of 8 rev: 18jun09 outline diagram suggested pad layout figure 3. figure 4. table 2. pin out pad # symbol i/o level function 1 brclk i nc or lvpecl, lvds nc or for external divider applications = pd feedback frequency 2 ld 1 o cmos lock detect logic ?0? = fx locked logic ?1? = no input output transitioning = out of lock 3 gnd gnd supply case and electrical ground 4 mode 2 i cmos fx operating mode logic ?0? = standard pll operation normal setting logic ?1? = fin coupled to fout 5 gnd gnd supply case and electrical ground 6 lfn analog loop filter node 7 clfn analog complementary loop filter node 8 fout o lvpecl or lvds frequency output 9 cfout o lvpecl or lvds complementary frequency output 10 vcc i supply power supply voltage (+3.3v 5%) 11 cfin i lvpecl complementary input frequency for cmos inputs, ac-couple unused i nput to ground or negative supply. 12 fin i cmos or lvpecl input frequency 13 gnd gnd supply case and electrical ground 14 cbrclk i nc or lvpecl, lvds nc or for external divider applications = comp. pd feedback frequency 1. it is recommended that a buffer driver is used for best noise isolation. 2. do not leave the mode pin floating, it should be set to logic 0 or ground for normal operation. 3. brclk and cbrclk should be left floating if not used. 4. fin, cfin, brclk, and cbrclk have internal pull-up/pull-do wn resistors and it is recommended to ac couple these inputs. mm [inch] 0.64 [0.025] 3.28 [0.129] 2.54 [0.100] 1.27 [0.050] 0.25 [0.010] 1.02 [0.040] 5.08 [0.200] 1.45 [0.057] 1.02 [0.040] 1.96 [0.077] 1.27 [0.050] 0.20 [0.008] 4.14 [0.163] 2.07 [0.081] fx730cccccc ? xx/xx ? vi ??? yww ?
fx-730 low jitter vcso frequency translator vectron international, 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 ? web: www.vectron.com page 4 of 8 rev: 18jun09 tape and reel (eia-481-2-a) tape dimensions (mm) reel dimensions (mm) dimension w f do po p1 a b c d n w1 w2 # per tolerance typ typ typ typ typ typ min typ min min typ max reel fx-730 16 7.5 1.5 4 8 178 1. 5 13 20.2 50 16.4 22.4 200 table 3. absolute maximum ratings parameter symbol ratings unit power supply v cc 0 to 6 v input current i in 100 ma output current i out 25 ma storage temperature t str -55 to 125 c soldering temperature/duration t peak / t p 260 / 40 c/sec stresses in excess of the absolute maximum ratings can permanently damage the device. also, exposure to these absolute maximum ratings for extended periods can adv ersely affect device reliability. functional operation is not implied at these or any other conditions in excess of those represented in the operational sections of this data sheet. permanent damage is also possible if any device input draws greater than 100 ma. application circuits please contact vectron applicati on engineering for assistance. po w a n f p1 w1 w2 c b d ?do
fx-730 low jitter vcso frequency translator vectron international, 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 ? web: www.vectron.com page 5 of 8 rev: 18jun09 the device has been qualified to meet the jedec standard for pb-free assembly. the temperatures and time intervals listed are based on the pb-free small body requirements. the temperatures refer to the topside of the package, measured on the package body surface. the fx-730 device is hermetically sealed so an aqueous wash is not an issue. 25 217 200 150 260 temperature (degc) time (sec) t s t a mb-p t l t p r r dn reliability vi qualification includes aging at various extreme temperat ures, shock and vibration, temperature cycling, and ir reflow simulation. the fx-730 family is undergoing the following qualification tests: table 4. environmental compliance parameter conditions mechanical shock mil-std-883, method 2002 mechanical vibration mil-std-883, method 2007 solderability mil-std-883, method 2003 gross and fine leak mil-std-883, method 1014 resistance to solvents mil-std-883, method 2016 moisture sensitivity level rating msl 1 eliability handling precautions although esd protection circuitry has been designed into the fx-730 proper precautions should be taken when handling and mounting. vi employs a human body model (hbm), a charged-device model (cdm), and machine model (mm) for esd susceptibility testing and design protection evaluation. table 5. esd ratings ? lvpecl output model class minimum conditions human body model 1a 350 v mil-std 883, method 3015 charged device model c5 1000 v jedec, jesd22-c101 machine model m1 50 v esd stm5.2-1999 table 6. reflow profile (ipc/jedec j-std-020c) parameter symbol value preheat time t s 60 sec min, 180 sec max ramp up r up 3 o c/sec max time above 217 o c t l 60 sec min, 150 sec max time to peak temperature t amb-p 480 sec max time at 260 o c t p 20 sec min, 40 sec max ramp down r dn 6 o c/sec max
fx-730 low jitter vcso frequency translator vectron international, 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 ? web: www.vectron.com page 6 of 8 rev: 18jun09 18.7500 ee 28.7040 f1 42.6600 jz 65.5360 j6 114.0000 l3 318.7500 pv 665.6256 pc 19.2000 dd 29.4912 f5 44.2095 kx 66.0000 ja 120.0000 lc 320.0000 pp 666.5143 p5 19.3927 dx 29.5000 f9 44.4343 lf 70.0000 kb 122.8800 lb 322.2656 pw 669.1281 r2 19.4400 d6 30.0000 he 44.6218 jw 70.6560 kc 124.4160 l7 328.7109 px 669.3266 r3 19.5313 dz 30.7200 h1 44.7360 j3 71.6100 kf 125.0000 l4 333.2571 py 669.6429 r1 19.6608 db 30.8800 hf 44.9280 je 73.7280 k8 130.0000 ld 334.6633 rb 670.8386 r7 19.6990 dk 31.2500 h8 45.1584 jg 74.1250 k1 139.2640 l5 336.0813 rc 672.1627 r5 19.7190 dh 32.0000 h2 45.8240 jm 74.1758 ka 150.0000 m8 353.6763 rd 673.4566 ra 19.9219 ed 32.7680 h3 46.7200 jk 74.2500 k7 150.1440 m6 375.0000 rf 684.2554 r9 20.0000 e2 33.0000 h7 46.8750 jy 75.0000 kh 155.5200 m2 409.6000 re 690.5692 r4 20.1416 e3 33.3330 hc 48.0000 jv 76.8000 k4 156.2500 m3 491.5200 pm 693.4830 r6 20.4800 e4 34.3680 h6 49.1520 j7 77.7600 k2 159.3750 m7 531.0000 ph 693.7500 r8 20.5444 ef 34.5600 hb 49.4080 j2 78.1250 k3 160.0000 m1 531.2500 p8 704.3806 tg 20.7135 e1 36.8640 hg 50.0000 jd 78.6432 k5 161.1328 m4 568.9286 pj 707.3527 tc 20.8286 eb 37.0560 h4 50.0480 kd 79.6875 kg 164.3554 m9 569.1964 p9 710.9486 t2 20.9165 eh 37.1250 h9 51.8400 j4 80.0000 k9 166.6286 m5 595.0560 pl 716.5732 t1 21.0051 ej 37.5000 hk 52.0000 jp 80.5664 kj 167.3316 n2 600.0000 pr 718.7500 t5 22.0000 e9 38.8800 h5 53.3300 ju 82.1777 kl 168.0407 n3 622.0800 p2 719.7344 t3 22.1048 ek 39.0625 hh 54.7460 jl 82.9440 k6 170.0000 n4 624.6938 pd 748.0709 t6 22.2171 e5 39.3216 hd 55.0000 jx 83.3142 kn 176.8381 na 624.7048 p6 750.0000 t7 22.5792 e8 39.8438 hj 60.0000 jr 83.6658 kr 182.0160 n8 625.0000 p3 777.6000 t4 24.0000 ec 40.0000 jf 61.3800 ky 84.0203 ku 187.5000 n5 627.3296 p7 779.5686 t8 24.5760 e6 40.2831 kk 61.4400 j5 88.4190 kw 195.0000 n7 629.9878 pa 780.8810 td 24.7040 e7 40.9600 j1 62.2080 j8 97.5000 ke 200.1920 n6 637.5000 pg 781.2500 t9 25.0000 f7 41.0889 km 62.5000 j9 100.0000 l8 201.4160 n1 640.0000 pn 796.8750 tb 25.1658 f8 41.6571 kp 62.9145 le 105.0000 l6 245.7600 n9 644.5313 p4 805.6641 ta 25.6000 f6 41.8329 kt 63.3600 jj 106.2500 l9 262.1440 nb 647.2394 pe 809.0635 te 25.9200 f2 42.0000 jb 63.8976 jn 108.0000 la 300.0000 pt 647.2508 pk 819.2000 th 26.0000 f3 42.0102 kv 64.0000 jt 110.0000 l1 311.0400 p1 649.9703 pf 821.7773 tf 27.0000 f4 42.5000 jc 64.1520 jh 112.0000 l2 312.5000 pu 657.4219 pb standard frequencies (mhz)
fx-730 low jitter vcso frequency translator vectron international, 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 ? web: www.vectron.com page 7 of 8 rev: 18jun09 ordering information for additional information, please contact: usa: vectron international ? ? ? fax: 1-888-fax-vectron europe: landstrasse, d-74924, neckarbischofsheim, germany ? tel: 49 (0) 7268 8010 ? fax: 49 (0) 7268 801281 asia: 1f-2f, no 8 workshop, no. 308 fenju road, waigaoqiao free trade zone, pudong, shanghai, china 200131 tel: 86 21 5048 0777 ? fax: 86 21 5048 1881 vectron international reserves the right to make changes to th e product(s) and or information contained herein without notice. no liability is assumed as a result of t heir use or application. no rights under any patent accompany the sale of any such pro duct(s) or information.
fx-730 low jitter vcso frequency translator vectron international, 267 lowell road, hudson, nh 03051 tel: 1-88-vectron-1 ? web: www.vectron.com page 8 of 8 rev: 18jun09 revision history: revision date plm approval eng req'd engineer approval date description 1 11/15/06 bw original release 1.1 6/19/07 bw added ?c? option to feedback divider field under ordering information. updated standard frequencies. 1.2 7/24/07 bw input amplitude, apr, frequency codes, ordering information. 1.3 6/18/09 bw marking drawing updated.
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